The fabrication of microelectronic devices involves forming electronic components on microelectronic substrates, such as silicon wafers. These electronic components may include transistors, resistors, capacitors, and the like, with intermediate and overlying metallization patterns at varying levels, separated by dielectric materials, which interconnect the electrical components to form integrated circuits. The metallization patterns are generally referred to as “interconnects”.
One process used to form interconnects is known as a “damascene process”. In a typical damascene process, a photoresist material is patterned on a dielectric material and the dielectric material is etched through the photoresist material patterning to form a hole, a trench or a via (hereinafter collectively referred to as “an opening” or “openings”). The photoresist material is then removed and the opening is then filled with a conductive material (e.g., such as a metal or metal alloys such as copper or a copper alloy) to form a conductive region for connection to other conductive means. The filling of the opening may be accomplished by either physical vapor deposition, chemical vapor deposition, or electroplating, as will be understood to those skilled in the art. The term “interconnect” is defined herein to include all interconnection components including trenches and vias filled with conductive material.
Subsequent layers deposited adjacent to the conductive regions are selected to avoid delamination and contamination issues resulting from electromigration (EM). Where copper has been deposited, an intervening layer such as silicon nitride is formed on the conductor or conductive region to provide a suitable interface for the deposition of one or more dielectric layers, such as a spin on dielectric layer. Application of a silicon nitride interface film is typically performed using chemical vapor deposition methods in chambers operating at 400 C or above. In some cases, dielectric films used in the formation of the conductive regions are limited to temperatures at or below 270 C, making these films incompatible with temperatures inherent to chemical vapor deposition processes.